Naslovnica Pretraživanje AAA
 

 


Broj posjeta:
51794
 
HRVATSKA SEKCIJA - ODJELI DRUŠTAVA

Odjel za elektromagnetsku kompatibilnost

Elektromagnetska kompatibilnost (electromagnetic Compatibility - EMC) je definirana kao sposobnost uređaja, opreme ili sustava da zadovoljavajuće radi u svom elektromagnetskom okruženju, tj. da radi u namijenjenim operacijskim uvijetima sa zadanim nivoima učinkovitosti bez pogoršanja zbog elektromagnetskih međudjelovanja, kao i da svojim radom ne uzrokuje neželjene elektromagnetske smetnje bilo čemu u tom okruženju. 
Poboljšanje elektromagnetske kompatibilnosti uključuje rad (koji time nije nužno i ograničen) u područjima: 

  1. Razvoj inženjerskih standarda
  2. Razvoj numeričkih modela
  3. Tehnike mjerenja i testne procedure
  4. Instrumenti za mjerenje
  5. Karakteristike sustava i opreme, kao što su osjetljivost (otpornost), povredljivost, odgovarajući efekti širenja, i subjektivni efekti.
  6. Unaprijeđenje tehnika i komponenata
  7. Edukacija o elektromagnetskoj kompaktibilnosti
  8. Studije o podrijetlu interferencija, obje umjetne i prirodne, i njihove klasifikacije
  9. EM zaštita
  10. Tehnike štićenja
  11. Nuspojave djelovanja elektromagnetske energije
  12. Znanstvene, tehničke, industrijske, profesionalne ili neke druge aktivnosti, koje dopridonose ovom području, ili koriste tehnike ili proizvode ovog područja.

 


Objavljeno: 20. 7. 2010. u 15:04

 

Poštovani članovi IEEE EMC Society 

 

IEEE EMC Society organizira predavanja istaknutog predavača  (Distinguished Lecturer) profesora Joungho Kim iz KAIST-a (Korea  Advanced Institute of Science and Technology) u formi online seminara.  Seminar će se održati 21.7.2010. s početkom u 9:00 i trajanjem do 12:00  po *američkom centralnom vremenu* (Central Daylight Saving Time  GMT-06:00). 

 

Prezentacije se mogu skinuti s linkova:

1) "Signal Integrity of TSV Based 3D IC":

 http://web.mst.edu/~jfan/slides/Kim_Signal_Integrity_July21_2010_1.pdf 

2) "Power Integrity of SiP (System in Package)":

 http://web.mst.edu/~jfan/slides/Kim_Power_Integrity_July21_2010_2.pdf 

 

U prilogu su sažeci predavanja i upute za spajanje. 

Srdačan pozdrav,

Antonio Šarolić

Predsjednik Odjela za elektromagnetsku kompatibilnost Hrvatske sekcije IEEE

(IEEE EMCS Croatia Chapter) 

 

Poštovani članovi IEEE EMC Society 

 

IEEE EMC Society organizira predavanja istaknutog predavača  (Distinguished Lecturer) profesora Joungho Kim iz KAIST-a (Korea  Advanced Institute of Science and Technology) u formi online seminara.  Seminar će se održati 21.7.2010. s početkom u 9:00 i trajanjem do 12:00  po *američkom centralnom vremenu* (Central Daylight Saving Time  GMT-06:00). 

 

Prezentacije se mogu skinuti s linkova:

1) "Signal Integrity of TSV Based 3D IC":

 http://web.mst.edu/~jfan/slides/Kim_Signal_Integrity_July21_2010_1.pdf 

2) "Power Integrity of SiP (System in Package)":

 http://web.mst.edu/~jfan/slides/Kim_Power_Integrity_July21_2010_2.pdf 

 

U prilogu su sažeci predavanja i upute za spajanje. 

Srdačan pozdrav,

Antonio Šarolić

Predsjednik Odjela za elektromagnetsku kompatibilnost Hrvatske sekcije IEEE

(IEEE EMCS Croatia Chapter) 

 

**************************************************

Raspored, sažeci predavanja i upute: 

 

1) Central Time 9:00 AM - 10:30 AM 

Title: "Signal Integrity of TSV Based 3D IC" 

 

Abstract:

Recently, process dimensions of Silicon based semiconductor  devices are reaching less than 20 nm scale. However, it suffers  significant technical and business challenges including enlarged leakage  current and considerable increase of investment budget. As a result, new  TSV (Through Silicon Via) based 3D IC technology is emerging as a  promising next generation IC technology in both semiconductor industry  and academia. In the 3D IC, very thin semiconductor dies of less than 30  um are vertical stacked to minimize the package size and to maximize the  semiconductor system performances. In the 3D IC, TSV is becoming the  most critical vertical interconnection structure between the  semiconductor dies. Around world, most of the semiconductor companies  including Intel, IBM, TI, AMD and Qualcomm are seriously considering the  TSV based 3D IC as a future direction of the semiconductor integration  technology. In the TSV based 3D IC, signal integrity is becoming the  major design obstacle due to the high frequency loss, coupling, and  electromagnetic radiation, while more than thousand of vertical and  lateral interconnections are routed in a tiny 3D space. It could be even  more serious in 3D IC for the applications of high-density and  multi-function mobile multimedia, computing, and communication system  platforms. In this talk, new modeling, measurement, design, and analysis  approaches will be introduced in order to enhance the performance and  reliability of the 3D IC.

____________________________________________ 

To join the online meeting 

1. Go to

https://mstedu.webex.com/mstedu/j.php?ED=118864222&UID=0&PW=NMTA3ZDhiMmU1&RT=MiM3

2. Enter your name and email address 

3. Meeting Number: 557 386 379

4. Meeting Password: 123456 

5. Follow the instructions that appear on your screen 

 

 

2) Central Time 10:30 AM - 12:00 PM 

Title: "Power Integrity of SiP (System-In-Package)"

 

Abstract:

Power supply noise by digital switching is becoming the major  source of electromagnetic noise generation and coupling in semiconductor  systems. It could be even more serious in 3D SiP for high-density and  multi-function mobile multimedia, computing, and communication system  platforms. In this talk, new modeling, design, and analysis approaches  will be introduced with the consideration of the power integrity. The  unique methods are based on simultaneous and hierarchical chip-package  co-design and modeling in order to offer cost effective design  solutions. In particular, we will shown novel design methods and test  results including thin film capacitor and EBG structures to minimize the  power supply noise generation and coupling.

____________________________________________ 

To join the online meeting 

1. Go to

https://mstedu.webex.com/mstedu/j.php?ED=118864252&UID=0&PW=NMzY3MjViYTli&RT=MiM3 

2. Enter your name and email address 

3. Meeting Number: 558 479 411

4. Meeting Password: 123456 

5. Follow the instructions that appear on your screen     

 

 

Dr. Joungho Kim received B.S. and M.S. degrees in electrical engineering  from Seoul National University, Seoul, Korea, in 1984 and 1986,  respectively, and Ph.D degree in electrical engineering from the  University of Michigan, Ann Arbor, in 1993. In 1994, he joined Memory  Division of Samsung Electronics, where he was engaged in Gbit-scale DRAM  design. In 1996, he moved to KAIST (Korea Advanced Institute of Science  and Technology). He is currently a Professor at Electrical Engineering  and Computer Science Department, and the group director of Convergence  Device and System Group. Since joining KAIST, his research centers on  EMC modeling, design, and measurement methodologies of 3D IC,  System-in-Package(SiP), and multi-layer PCB. Especially, his major  research topic is focused on chip-package co-design and simulation for  signal integrity, power integrity, ground integrity, timing integrity,  and radiated emission of 3D IC and SiP. He has successfully demonstrated  low noise and high performance designs of numerous SiP's for wireless  communication applications such as ZigBee, T-DMB, NFC, and UWB.  Recently, he is playing a leading role in a national project, OLEV  (Online Electrical Vehicle) project, for EMI and EMF reduction design.  He was on a sabbatical leave during an academic year from 2001 to 2002  at Silicon Image Inc., Sunnyvale CA. He was responsible for low noise  package designs for SATA, FC, HDMI, and Panel Link SerDes devices. He  has authored and co-authored over 300 technical papers published at  refereed journals and conference proceedings in modeling, design, and  measurement of 3D IC, SiP, and PCB. Also, he has given more than 130  invited talks and tutorials at the academia and the related industries.  He received Outstanding Academic Achievement Faculty Award of KAIST in  2006, Best Faculty Research Award of KAIST in 2008, National 100 Best  Project Award in 2009, and KAIST International Collaboration Award in  2010, respectively. Dr. Joungho Kim was the symposium chair of IEEE  EDAPS 2008 Symposium. He is appointed as an IEEE EMC society  distinguished lecturer in a period from 2009-2011. He received  Technology Achievement Award from IEEE Electromagnetic Society in 2010.  Currently, he is an associated editor of the IEEE Transactions of  Electromagnetic Compatibility, and serving as a guest editor of the  special issue in the IEEE Transactions of Electromagnetic Compatibility  for PCB level signal integrity, power integrity, and EMI/EMC, and, also  as a guest editor of the special issue in the IEEE Transactions of  Advanced Packaging for TSV (Through-Silicon-Via).

 

Antonio Šarolić
Popis obavijesti
REPOZITORIJ
Mandatno razdoblje
do 31.12.2017
 
 
Vicko Dorić
predsjednik odjela
 

Zlatko Živković
dopredsjednik odjela
 

Maja Škiljo
tajnica odjela

e-mail