Odjel za električne krugove i sustave
Pozivam Vas na 1. predavanje ove godine u organizaciji odjela za električne krugove i sustave (Circuits and Systems-CAS 04) Hrvatske sekcije IEEE i Zavoda za elektroničke sustave i obradbu informacija
koje će se održati u ponedjeljak 11. srpnja 2011. u 11:00 sati u ZESOI knjižnici D115
Predavač je:
doc. dr. sc. Dražen Jurišić, dipl.ing.
Naslov predavanja je:
Ladder–Biquad Filter Partitioning for On-chip Tuning
Predavanje je o temi rada koji je prihvaćen za objavljivanje na ovogodišnjoj konferenciji ECCTD 2011, Linköping, Švedska, 29-31 kolovoz, 2011.
Predsjednik CAS04 Odjela
Abstract— One of the problems with on-chip active-RC filters is that in order to satisfy tight specifications accurately, they need to be fine-tuned. This becomes more difficult with increasing filter order. In this paper, we introduce a simplified tuning method which is obtained by a new structure consisting of a filter section of second- or third-order (Biquad or Bitriplet which is referred to as a 'tuning block'), in cascade with a ladder-RLC filter (passive LC, or simulated-active RC). The cut-off frequency of the resulting filter can be simply tuned by adjusting one component of the tuning block. The new ladder tuning-block (LTB) is compared with two conventional structures, a cascade of Biquads and a single-ladder filter. Fine tuning these two structures is considerably more complicated. It is shown that beside the advantage of ease of tuning, the sensitivity to component tolerances of the new structure is lower than that of the two conventional ones, for the price of a slightly higher filter order.