Poziv na IEEE predavanje: Single-Photon Avalanche Diodes in High-Voltage CMOS Technology

Sažetak predavanja

Single-photon avalanche diodes (SPADs) are solid-state detectors used in numerous applications that require the detection of low-intensity optical signals, down to a single photon, with a high time resolution. These requirements are crucial e.g. in fluorescence lifetime microscopy (FLIM), 2D and 3D imaging, laser imaging detection and ranging (LIDAR), quantum key distribution (QKD), and particle detection. In all of these applications, in addition to optimizing SPAD parameters such as a high photon detection efficiency (PDE), low dark count rate (DCR), and low afterpulsing probability, the integration of the photodetector and the associated signal processing electronics on the same chip is highly desirable, particularly when using highly scaled commercial CMOS technologies, which lead to a significant cost reduction and a potential improvement in reliability and integration density. In order to address the above requirements, SPADs with various layouts and an active quenching circuit (AQC) have been implemented in a commercial 180 nm high-voltage bipolar-CMOS-DMOS (BCD) technology. The noise performance of the fabricated SPADs is characterized by using different types of quenching circuits, analyzing their layout and temperature dependences. SPADs with circular and octagonal layout exhibit state-of-the-art noise performance with DCRs as low as 0.47 Hz/μm² at room temperature and at the excess voltage of 5 V. DCR value can be decreased even further, down to 1.4 Hz/μm², by cooling down the circular SPAD connected to the AQC to 250 K, making the structures promising candidates for low-cost large-scale SPAD array imagers.

Biografija predavača

Borna Požar was born on October 1^st, 1997 in Karlovac, Croatia. After finishing Karlovac Technical School, he enrolled 2016 in the Faculty of Electrical Engineering and Computing at the University of Zagreb. During his studies, his work was focused on subjects in the field of microelectronics, semiconductor technology, and RF communications. He received bachelor’s and master’s degrees in 2019 and 2021, respectively. As of October 2021, he is with the Department of Electronics, Microelectronics, Computer and Intelligent Systems employed as a Research and Technical Assistant. Over a period from October 2021 to April 2023, he worked on the project “Next generation of Semiconductor Device and Integrated Circuits for the Internet of Things Era” led by professor Tomislav Suligoj. As of December 2023, he is working on the project “Advanced Semiconductor Devices at Their Limits”. In addition to his academic involvement at the University of Zagreb, he also participates in a project with the European Organisation for Nuclear Research (CERN) for the CASSIA detectors. His research is focused on the design and optimization of single photon avalanche diodes and integrated circuits.