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Poziv na IEEE predavanje: ESD protection design and testing – a long journey, and yet a challenge for future technologies.

Odjel za električne krugove i sustave (CAS04) i Zajednički odjel za elektroničke elemente / poluvodičke integrirane sklopove (ED15/SSC37) Hrvatske sekcije IEEE poziva Vas na predavanje:

ESD protection design and testing – a long journey, and yet a challenge for future technologies

koje će održati Harald Gossner, Senior Principal Engineer at Intel. Predavanje će se održati u petak 16. svibnja 2025. s početkom u 9:00 sati u Sivoj vijećnici.

Predviđeno trajanje predavanje s raspravom je 60 minuta. Predavanje je otvoreno za sve zainteresirane, a posebno pozivamo studente. Više o predavaču i predavanju možete pročitati u opširnijem sadržaju obavijesti.

Abstract:

Electrostatic Discharge (ESD) protection design is required for any IC component in the field. Downscaling of technology dimensions and new materials make it even more challenging to find a power and area efficient solution. This includes optimization of devices and circuits. The talk will present the fundamental concepts of ESD protection design and highlight the challenges of current Finfet and Gate-all around technologies as well as high voltage technologies. The second part will provide an overview of the initiatives and the White Papers of the Industry Council on ESD Target Levels representing more than 60 companies and RnD organizations. The council will meet at the university. The topics are protection of die-to-die interfaces, system stress at IC pins and the specification of a transient absolute maximum ratings (AMR). All faculty members are also invited to join the open session of the Industry Council from 10 am to 12:30 pm.

Biography:

Harald Gossner is Senior Principal Engineer at Intel. He received his diploma degree in physics from Ludwig-Maximilians-University, Munich in 1990 and his PhD in electrical engineering from Universität der Bundeswehr, Munich in 1995. For 15 years he has worked on the development of ESD protection concepts with Siemens and Infineon Technologies. In 2011 he joined Intel leading the system ESD robustness development for Intel products. Harald Gossner has authored and co-authored 150 technical papers and two books in the fields of ESD and device physics, where he also holds 120 patents. He is the recipient of the outstanding achievement award of EOS/ESD Association as highest award for his contributions to the field of ESD. He is the cofounder and co-chair of the Industry Council on ESD Target Levels. He also served as president of the EOS/ESD Association, Rome, NY, from January 2022 to December 2023. Harald Gossner is IEEE Fellow and contributes as editor to IEEE EDL. Currently he is member of the industry advisory boards of the Bavarian Government and Fraunhofer institutes and participates in the expert commission on AI of the German Economic Council. He is also project lead of the project Semiconductor-X, coordinating the development of a resilient supply chain of semiconductors for Europe.