Poziv na IEEE DL predavanje: Hardware Security and Safety of IC Chips and Systems

Sažetak predavanja

IC chips are key enablers to a smartly networked society and need to be more compliant to security and safety. For example, semiconductor solutions for autonomous vehicles must meet stringent regulations and requirements. While designers develop circuits and systems to meet the performance and functionality of such products, countermeasures are proactively implemented in silicon to protect against harmful disturbances and even intentional adversarial attacks. This talk will start with electromagnetic compatibility (EMC) techniques applied to IC chips for safety to motivate EMC-aware design, analysis, and implementation. It will discuss IC design challenges to achieve the higher levels of hardware security (HWS). Crypto-based secure IC chips are investigated to avoid the risks of side-channel leakages and side-channel attacks, corroborated with silicon demonstrating analog techniques to protect digital functionality. The EMC and HWS disciplines derived from electromagnetic principles are key to establishing IC design principles for security and safety.

Biografija predavača

Makoto Nagata received the B.S. and M.S. degrees in physics from Gakushuin University, Tokyo, Japan, in 1991 and 1993, respectively, and the Ph.D. degree in electronics engineering from Hiroshima University, Hiroshima, Japan, in 2001. He was a research associate at Hiroshima University from 1994 to 2001, an associate professor at Kobe University, Kobe, Japan, from 2002 to 2008, and promoted to a full professor in 2009. He was the dean of the graduate school of science, technology and innovation, Kobe University (2022-2023).

His research interests include the design techniques of high-performance analog, RF and digital VLSI systems with particular emphasis on power/signal/substrate integrity and electromagnetic compatibility, testing and diagnosis, 2.5D and 3D system integration, as well as their applications for hardware security and hardware safety, and cryogenic electronics for quantum computing.

Dr. Nagata is a Senior Member of IEICE, and currently serves as the president of Electronics Society of IEICE. He held technical program committee (TPC) positions among various international conferences, such as the Symposium on VLSI Circuits (2002–2009), Custom Integrated Circuits Conference (2007–2009), Asian Solid-State Circuits Conference (2005–2009), International Solid-State Circuits Conference (2014-2022), European Solid- State Circuits Conference (2020-2022), and many others. He chaired the Technology Directions subcommittee for International Solid-State Circuits Conference (2018-2022) and served for an executive committee member (2023-present) of the conference. He was the TPC chair (2010–2011), the symposium chair (2012–2013), and an executive committee member (2014–2015) for the Symposium on VLSI circuits. He is currently an organizing committee chair of the Asian Hardware Oriented Security and Trust Symposium (December 2024, Kobe). He was the IEEE Solid-State Circuits Society (SSCS) AdCom member (2020-2022), the distinguished lecturer (2020-2021 and 2024-present), and currently serves as the chapters vice chair (2022-) of the society. He is an associate editor for IEEE Transactions on VLSI Systems (since 2015).