Zajednički odjel za elektroničke elemente / poluvodičke integrirane sklopove (ED15/SSC37) Hrvatske sekcije IEEE poziva Vas na predavanje:
Nanoelectronics: Towards End of Scaling and Beyond,
koje će održati Prof. Bin Yu (IEEE Fellow), State University of New York, SAD. Predavanje je organizirano u okviru programa IEEE Distinguished Lecturer i održat će se u ponedjeljak 11. lipnja 2018. s početkom u 10:00 sati u Sivoj vijećnici Fakulteta elektrotehnike i računarstva Sveučilišta u Zagrebu, Unska 3, Zagreb.
Predavanje je na engleskom jeziku, a predviđeno trajanje s raspravom je 60 minuta. Predavanje je otvoreno za sve zainteresirane, a posebno pozivamo studente.
Više o predavaču i predavanju možete pročitati u opširnijem sadržaju obavijesti.
This seminar is divided into two parts: In the first part, some general trends in nanoscale silicon-based CMOS integrated chip technology will be briefly reviewed – from material, devices, performance, and integration perspective. As one of the examples of the latest industrial effort on developing ultra-scalable chip technology, research on non-conventional transistor structure will be discussed with focus on the “three-dimensional” FinFET. In the second part of the seminar, the role of emerging nanostructures and the associated nano-devices in the “post-silicon” era will be discussed. Graphene has received significant interests from academia and industry, attributed to its distinctive layered configuration, band structure, and quantum phenomena. The atomically-thin sheets could be potentially grown by thin-film techniques. While graphene has been explored as active and passive elements in future electronics, its gap-less nature implies fundamental limits that promote innovations in device principle. This seminar will introduce the latest research in prototype demonstration of logic switches, memories, and on-chip interconnects on emerging 2D materials. Major challenges and near-future research opportunities will be highlighted.
Dr. Bin Yu received Ph.D. degree in Electrical Engineering from University of California at Berkeley. He is Professor at College of Nanoscale Science & Engineering, State University of New York. His research is in the field of solid-state devices, nanoelectronics, and nanomaterials. Specific interests include post-CMOS/post-Si devices, non-volatile memories, carbon-based interconnects, sensors, solar cells, and other emerging devices based on 1D/2D/3D nanostructures. He has authored/co-authored 8 book/contributed book chapters, more than 260 research papers, and was the speaker of more than 120 keynote/highlight/invited talks to conferences, professional societies, universities, national labs, and industry. As one of the most prolific inventors in electronics, he has more than 300 awarded U.S. patents and several dozens of European/Japanese/Taiwanese patents. Dr. Yu served on the invited panels and advisory/technical program committees of many international conferences. He was/is Editor of IEEE Electron Devices Letters, Associated Editor of IEEE Transactions on Nanotechnology, Editor of Nano-Micro Letters, and Guest Editor of IEEE Transactions on Electron Devices and IEEE Transactions on Nanotechnology. He is Fellow of IEEE, Fellow of National Academy of Inventors (NAI), and recipient of IBM Faculty Award. His prior research accomplishments include the industry’s first THz silicon CMOS transistor (IEEE-IEDM’ 2001) and the industry’s first 10-nm gate length FinFET (IEEE-IEDM’2002).